K. N. Toosi University of Technology

 Mehdi Ehsanian

Publications

Journal Papers

[1] M. Moradi, M. Ehsanian, "Design of an FPGA Based DPLL with Fuzzy Logic Controllable Loop Filters with Application Customization Capability," International Journal of Electronics and Communications, September 23, 2018.

[2] H. Esmaeili Taheri, M. Ehsanian "A new adaptive bandwidth, adaptive jitter frequency synthesizer using programmable charge pump circuit," Analog Integrated Circuits and Signal Processing, Springer NatureJan 2018.

[3] M. Ehsanian, M. Askari-Raad, "A Built-In Self-Test structure for measuring gain and 1-dB compression point of Power Amplifier," AEU-International Journal of Electronics and Communications, Volume 86, January 2018, Pages 47-54.

[4] M. Karami, A. Mousavinia and M. Ehsanian,  "A General Solution for Iso-Disparity Layers and Correspondence Field Model for Stereo Systems," in IEEE Sensors Journal, vol. 17, no. 12, pp. 3744-3753, June15, 15 2017.

[5]  M. Khanlari, M. Ehsanian, "An improved KFCM clustering method used for multiple fault diagnosis of analog circuits," In Circuits, Systems, and Signal Processing(2017), 36(9), 3491-3513.

[6] H. Hayati, M. Ehsanian, "A 5-gbps CMOS burst-mode CDR circuit with an analog phase interpolator for PONs,"  Informacije MidemVol. 45, No. 1 (2015), 39 – 46.

[7]  M. Ehsanian, B. Kaminska, K. Arabi, "A new on-chip digital BIST for analog-to-digital converters," In Microelectronics Reliability, Volume 38, Issue 3, 1998, Pages 409-420, ISSN 0026-2714.

[8]  M. Ehsanian, "A Novel Current mode switch for high performance application," in IEEE Journal of Solid-State Circuits.

[9]  M. Ehsanian, B. Kaminska, "A BiCMOS wideband operational amplifier with 900 MHz gain-bandwidth and 90 dB DC gain," In Analog Integrated Circuits and Signal Processing, Vol. 11, No. 1, Sep 01, 1996, pages 63-71, ISSN 1573-1979.

 

Conference Papers

[1] S. M. Navidi, M. Ehsanian, "A 9-bit Low-Power Fully Differential SAR ADC Using Adaptive Supply and Reference Voltage," 2018 26th Iranian Conference Electrical Engineering (ICEE2018), Mashhad, May. 2018.

[2] S. Makhsuci, M. Ehsanian,  "Oscillation-based Test for Measuring 1dB Gain Compression Point of Power Amplifiers," 2018 26th Iranian Conference Electrical Engineering (ICEE2018), Mashhad, May. 2018.

[3] S. Sabbaghi Saber, M. Ehsanian, "A 9-10.8 Gb/s Linear Clock and Data Recovery System with Adaptive Loop Gain," 2018 26th Iranian Conference Electrical Engineering (ICEE2018), Mashhad, May. 2018.

[4] S. Azizian, D. Asemani, M. Ehsanian, "Time-Interleaved ADC Performavce Analysis Considering Clock Skew Effects," 2017 4th International Conference on Knowledge-Based Engineering and Innovation (KBEI), Tehran, Dec. 2017.

[5] S. M. Navidi, M. Ehsanian, "A 20 ppm/�C Voltage Reference Cell Using a Low-Power CTAT Voltage Generator," 2017 4th International Conference on Knowledge-Based Engineering and Innovation (KBEI), Tehran, Dec. 2017.

[6] S. Makhsuci, M. Ehsanian, "A Built-In Self-Test Circuit for Measuring 1dB Gain Compression Point of Power Amplifiers," 2017 4th International Conference on Knowledge-Based Engineering and Innovation (KBEI), Tehran, Dec. 2017.

[7] S. S. Saber and M. Ehsanian, "A linear high capture range CDR with adaptive loop bandwidth for SONET application," 2017 29th International Conference on Microelectronics (ICM), Beirut, Lebanon, 2017, pp. 1-4.

[8] M. Moradi and M. Ehsanian, "An FPGA based DPLL with fuzzy logic controllable loop filters," 2017 29th International Conference on Microelectronics (ICM), Beirut, Lebanon, 2017, pp. 1-4.

[9] A. Abedini and M. Ehsanian, "Defect detection on IC wafers based on neural network," 2017 29th International Conference on Microelectronics (ICM), Beirut, Lebanon, 2017, pp. 1-4.

[10] H. Esmaeili Taheri, M. Ehsanian, "A high-performance LC-VCO based adaptive bandwidth, adaptive jitter phase locked loop," 2017 Iranian Conference on Electrical Engineering (ICEE), Tehran, 2017, pp. 170-173.

[11] M. Moradi, M. Ehsanian, "An FPGA based robust and intelligent DPLL with application customisation capability," 2017 Iranian Conference on Electrical Engineering (ICEE), Tehran, 2017, pp. 482-486.

[12] M. Khanlari, M. Ehsanian, "An Improved KFCM clustering method," 2017 Iranian Conference on Electrical Engineering (ICEE), Tehran, 2017.

[13] R. Erfani, F. Marefat and M. Ehsanian, "Highly phase-linear self-biased CMOS IR-UWB LNA with Sub-ps group-delay variations," 2016 28th International Conference on Microelectronics (ICM), Giza, 2016, pp. 153-156.

[14] Fakharyan, M. Ehsanian, "A sub-1V nanowatt CMOS bandgap voltage reference with temperature coefficient of 13ppm/�C," 2015 23rd Iranian Conference on Electrical Engineering, Tehran, 2015, pp. 1129-1132.

[15] M. Karami, A. Moosavinia, M. Ehsanian and M. Teshnelab, "A new evolutionary optimization algorithm inspired by Plant Life Cycle," 2015 23rd Iranian Conference on Electrical Engineering, Tehran, 2015, pp. 573-577.

[16] Javid, H. Vahedian, A. M. Sodagar and M. E. Mofrad, "Low-power, high-data-rate, BPSK demodulator for implantable biomedicai applications," 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS), Marseille, 2014, pp. 415-418.

[17] M. Nekoui, A. M. Sodagar and M. Ehsanian, "Area-efficient single-stage configuration for implantable neural recording amplifiers based on back attenuation," 2014 IEEE Biomedical Circuits and Systems Conference (BioCAS) Proceedings, Lausanne, 2014, pp. 396-399.

[18] R. Erfani, F. Marefat and M. Ehsanian, "Self-biased resistive-feedback current-reused CMOS UWB LNA with 1.7dB nf for IR-UWB applications," 2014 26th International Conference on Microelectronics (ICM), Doha, 2014, pp. 132-135.

[19] H. Hayati and M. Ehsanian, "Low-power burst-mode clock recovery circuit using analog phase interpolator," 2014 26th International Conference on Microelectronics (ICM), Doha, 2014, pp. 120-123.

[20] A. Sohrabi and M. Ehsanian, "A widebound low phase noise LC-VCO based PLL with automatic amplitude control," 2014 26th International Conference on Microelectronics (ICM), Doha, 2014, pp. 44-47.

[21] Z. Salehi Marzijarani, M. Ehsanian, "Design of a Fuzzy Controller for jitter Optimization in PLLs," 2013 Iranian Conference on Electrical Engineering (ICEE), Mashhad, 2013.

[22] M. Karimi, A. M. Sodagar, M. Ehsanian Mofrad and P. Amiri, "Auxiliary-carrier load-shift keying for reverse data telemetry from biomedical implants," 2012 IEEE Biomedical Circuits and Systems Conference (BioCAS), Hsinchu, 2012, pp. 220-223.

[23] K. Udawatta, M. Ehsanian, S. Maidanov and S. Musunuri, "Test and validation of a non-deterministic system — True Random Number Generator," 2008 IEEE International High Level Design Validation and Test Workshop, Incline Village, NV, 2008, pp. 77-84.

[24] M. Ehsanian, N. B. Hamida and B. Kaminska, "A novel A/D converter for high-resolution and high-speed applications," Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on, 1997, pp. 433-436 vol.1.

[25] M. Ehsanian, B. Kaminska, "A BiCMOS wideband operational amplifier with 900 MHz gain-bandwidth and 90 dB DC gain," 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96, Atlanta, GA, 1996, pp. 171-174 vol.1.

[26] M. Ehsanian, B. Kaminska and K. Arabi, "A new digital test approach for analog-to-digital converter testing," Proceedings of 14th VLSI Test Symposium, Princeton, NJ, 1996, pp. 60-65.

[27] M. Ehsanian, B. Kaminska, " A new on chip digital BIST for analog-to-digital converter," In International Conference on Quality in Electronic Components, Bordeaux, October 95.

 

Accepted and Submitted Papers in Journals & Conference